View IP4364CX8_1703434.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1. product pro?le 1.1 general description the ip4064cx8/lf and IP4364CX8/lf are 3-channel rc low-pass ?lter arrays which are designed to provide ?ltering of undesired rf signals in the 800 mhz to 3000 mhz frequency band. in addition, the ip4064cx8/lf and IP4364CX8/lf incorporate diodes to provide protection to downstream components against electrostatic discharge (esd) voltages as high as 15 kv contact and > 15 kv air discharge, far exceeding iec61000-4-2, level 4. the ip4064cx8/lf and IP4364CX8/lf are fabricated using monolithic silicon technology and integrate three resistors and seven high-level esd-protection diodes in a single wafer level chip-scale package. these features make the ip4064cx8/lf and IP4364CX8/lf ideal for use in applications requiring component miniaturization, such as mobile phone handsets, cordless telephones and personal digital devices. 1.2 features n pb-free and rohs compliant n 3-channel sim card interface integrated rc-?lter array n 100 w /100 w /47 w series channel resistors integrated n downstream esd protection up to 15 kv (contact) exceeding iec61000-4-2, level 4 n wafer level chip-scale package with 0.4 mm (IP4364CX8/lf) and 0.5 mm (ip4064cx8/lf) pitch 1.3 applications n sim interfaces in e.g. cellular and pcs mobile handsets ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection to iec61000-4-2, level 4 rev. 01 12 november 2007 product data sheet
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 2 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection 2. pinning information 2.1 pinning 2.2 pin description 3. ordering information fig 1. pin con?guration ip4064cx8/lf fig 2. pin con?guration IP4364CX8/lf 001aag227 ip4064cx8/lf transparent top view bump a1 index area a 23 1 b c 001aag228 IP4364CX8/lf transparent top view bump a1 index area a 23 1 b c table 1. pin description pin description a2 external pin 1 a3 internal pin 1 b1 external pin 2 b2 ground b3 internal pin 2 c1 external pin 3 c2 supply esd protection c3 internal pin 3 table 2. ordering information type number package name description version ip4064cx8/lf wlcsp8 wafer level chip-size package; 8 bumps; 1.41 1.41 0.7 mm ip4064cx8/lf IP4364CX8/lf wlcsp8 wafer level chip-size package; 8 bumps; 1.16 1.16 0.66 mm IP4364CX8/lf
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 3 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection 4. functional diagram 5. limiting values [1] device is tested with 1000 pulses of 15 kv contact discharges each, according the iec61000-4-2 model and so exceeds the speci?ed level 4 (8 kv contact discharge) by far. fig 3. schematic diagram ip4064cx8/lf and IP4364CX8/lf 001aag217 100 w r1 47 w r2 100 w r3 a3 b3 c3 iec61000-4-2 level 1 protection pins iec61000-4-2 level 4 protection pins b2 a2 c2 b1 c1 table 3. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v i input voltage - 0.5 +5.5 v v esd electrostatic discharge pins a2, b1, c1, c2 to b2 contact discharge [1] - 15 +15 kv air discharge [1] - 15 +15 kv iec 61000-4-2, level 4, pins a2, b1, c1, c2 to b2 contact discharge - 8+8kv air discharge - 15 +15 kv iec 61000-4-2, level 1, all other pins to b2 contact discharge and air discharge - 2+2kv p ch channel power dissipation continuous power; t amb =70 c -60mw p tot total power dissipation t amb = 70 c - 180 mw t stg storage temperature - 55 +150 c t re?ow(peak) peak re?ow temperature 10 s maximum - 260 c t amb ambient temperature - 30 +85 c
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 4 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection 6. characteristics table 4. characteristics t amb = 25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit r s(ch) channel series resistance r1, r3 75 100 125 w r2 35.2 47 58.8 w c ch channel capacitance including diode capacitance; v i = 0 v; f = 1 mhz --20pf v br breakdown voltage i test = 1 ma 6 - 10 v i lr reverse leakage current v i = 3 v - - 50 na
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 5 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection 7. application information 7.1 insertion loss the ip4064cx8/lf and IP4364CX8/lf is mainly designed as an emi/rfi ?lter for sim card interfaces. the insertion loss in a 50 w system for all three channels of the IP4364CX8/lf is shown in figure 5 as an example. the insertion loss of ip4064cx8/lf is identical. the insertion loss of the three channels was measured with a test pcb utilizing laser drilled micro-via holes that connect the pcb ground plane to the ground pins. fig 4. frequency response set-up (1) pin b1 to b3. (2) pin a2 to a3. (3) pin c1 to c3. fig 5. typical ip4064cx8/lf and IP4364CX8/lf frequency response curves out 001aag218 50 w 50 w v gen dut in test board 001aag219 - 20 - 30 - 10 0 s 21 (db) - 40 f (mhz) 10 - 1 10 4 10 3 110 2 10 (1) (3) (2)
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 6 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection 7.2 crosstalk the set-up for crosstalk measurements in a 50 w system from one channel to another is shown in figure 6 . four typical examples of crosstalk measurement results are depicted in figure 7 . channels not shown there behave similar. unused channels are terminated with 50 w to ground. fig 6. crosstalk measurement con?guration (1) pin c1 to b3. (2) pin b1 to c3. (3) pin b1 to a3. (4) pin a2 to c3. fig 7. typical ip4064cx8/lf and IP4364CX8/lf crosstalk behavior out_2 001aag220 50 w 50 w v gen dut in_1 out_1 in_2 test board 50 w 50 w 001aag221 - 60 - 40 - 80 - 20 0 s 21 (db) - 100 f (mhz) 110 4 10 3 10 10 2 (1) (2) (3) (4)
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 7 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection 8. package outline fig 8. package outline ip4064cx8/lf (wlcsp8) references outline version european projection issue date iec jedec jeita ip4064cx8/lf ip4064cx8/lf unit a max mm 0.7 0.26 0.22 0.44 0.38 1.46 1.36 1.46 1.36 0.5 1 0.005 a 1 dimensions (mm are the original dimensions) wlcsp8: wafer level chip-size package; 8 bumps; 1.41 x 1.41 x 0.7 mm 0 0.25 0.5 mm scale a 2 b 0.37 0.27 d e e e 1 e 2 1 v y 0.02 c y x b e 2 e 1 e e a c b ? v m c 123 a b detail x a a 2 a 1 bump a1 index area b a e d 07-05-09 07-05-25
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 8 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection fig 9. package outline IP4364CX8/lf (wlcsp8) references outline version european projection issue date iec jedec jeita IP4364CX8/lf IP4364CX8/lf unit a max mm 0.66 0.22 0.18 0.44 0.38 1.21 1.11 1.21 1.11 0.4 0.8 0.005 a 1 dimensions (mm are the original dimensions) wlcsp8: wafer level chip-size package; 8 bumps; 1.16 x 1.16 x 0.66 mm a 2 b 0.31 0.21 d e e e 1 e 2 0.8 v y 0.02 c y x e 2 e 1 e e b a c b ? v m 1 c b a 23 bump a1 index area b a d e detail x a a 2 a 1 0 0.25 0.5 mm scale 07-05-09 07-05-25
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 9 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection 9. soldering 9.1 introduction to soldering wlcsp packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering wlcsp (wafer level chip-size packages) can be found in application note an10439 wafer level chip scale package and in application note an10365 surface mount re?ow soldering description . wave soldering is not suitable for this package. all nxp wlcsp packages are lead-free. 9.2 board mounting board mounting of a wlcsp requires several steps: 1. solder paste printing on the pcb 2. component placement with a pick and place machine 3. the re?ow soldering itself 9.3 re?ow soldering key characteristics in re?ow soldering are: ? lead-free versus snpb soldering; note that a lead-free re?ow process usually leads to higher minimum peak temperatures (see figure 10 ) than a pbsn process, thus reducing the process window ? solder paste printing issues, such as smearing, release, and adjusting the process window for a mix of large and small components on one board ? re?ow temperature pro?le; this pro?le includes preheat, re?ow (in which the board is heated to the peak temperature), and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic) while being low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classi?ed in accordance with t ab le 5 moisture sensitivity precautions, as indicated on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during re?ow soldering, see figure 10 . table 5. lead-free process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 10 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection for further information on temperature pro?les, refer to application note an10365 surface mount re?ow soldering description . 9.3.1 stand off the stand off between the substrate and the chip is determined by: ? the amount of printed solder on the substrate ? the size of the solder land on the substrate ? the bump height on the chip the higher the stand off, the better the stresses are released due to tec (thermal expansion coef?cient) differences between substrate and chip. 9.3.2 quality of solder joint a ?ip-chip joint is considered to be a good joint when the entire solder land has been wetted by the solder from the bump. the surface of the joint should be smooth and the shape symmetrical. the soldered joints on a chip should be uniform. voids in the bumps after re?ow can occur during the re?ow process in bumps with high ratio of bump diameter to bump height, i.e. low bumps with large diameter. no failures have been found to be related to these voids. solder joint inspection after re?ow can be done with x-ray to monitor defects such as bridging, open circuits and voids. 9.3.3 rework in general, rework is not recommended. by rework we mean the process of removing the chip from the substrate and replacing it with a new chip. if a chip is removed from the substrate, most solder balls of the chip will be damaged. in that case it is recommended not to re-use the chip again. msl: moisture sensitivity level fig 10. temperature pro?les for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 11 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection device removal can be done when the substrate is heated until it is certain that all solder joints are molten. the chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. removing the device must be done using plastic tweezers, because metal tweezers can damage the silicon. the surface of the substrate should be carefully cleaned and all solder and ?ux residues and/or under?ll removed. when a new chip is placed on the substrate, use the ?ux process instead of solder on the solder lands. apply ?ux on the bumps at the chip side as well as on the solder pads on the substrate. place and align the new chip while viewing with a microscope. to re?ow the solder, use the solder pro?le shown in application note an10365 surface mount re?ow soldering description . 9.3.4 cleaning cleaning can be done after re?ow soldering. 10. abbreviations 11. revision history table 6. abbreviations acronym description dut device under test emi electromagnetic interference esd electrostatic discharge pcb printed-circuit board pcs personal communication system rfi radio frequency interference rohs restriction of the use of certain hazardous substances directive sim subscriber identity module table 7. revision history document id release date data sheet status change notice supersedes ip4064cx8lf_IP4364CX8lf_1 20071112 product data sheet - -
ip4064cx8lf_IP4364CX8lf_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 12 november 2007 12 of 13 nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection 12. legal information 12.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 12.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 12.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 12.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 13. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors ip4064cx8/lf; IP4364CX8/lf integrated sim card passive ?lter array with esd protection ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 12 november 2007 document identifier: ip4064cx8lf_IP4364CX8lf_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 14. contents 1 product pro?le . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 general description. . . . . . . . . . . . . . . . . . . . . . 1 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 pinning information . . . . . . . . . . . . . . . . . . . . . . 2 2.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 5 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 application information. . . . . . . . . . . . . . . . . . . 5 7.1 insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 crosstalk. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 9 soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9.1 introduction to soldering wlcsp packages . . . 9 9.2 board mounting . . . . . . . . . . . . . . . . . . . . . . . . 9 9.3 re?ow soldering . . . . . . . . . . . . . . . . . . . . . . . . 9 9.3.1 stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 9.3.2 quality of solder joint . . . . . . . . . . . . . . . . . . . 10 9.3.3 rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 9.3.4 cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 10 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 12 legal information. . . . . . . . . . . . . . . . . . . . . . . 12 12.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 12.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 contact information. . . . . . . . . . . . . . . . . . . . . 12 14 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

▲Up To Search▲

Price & Availability of IP4364CX8

	To Download IP4364CX8 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .